发明名称 |
Linear progression delay register |
摘要 |
An adjustable delay line includes a series of delay elements for adjusting the accumulative delay. Each element has a plurality of registers indicating to various devices within the delay element to be ‘on’ or ‘off’, thereby changing the time delay through the element. A master control indicates to the delay line whether to go faster (increment) or go slower (decrement). When one of these control signals is applied to the delay line, it is applied to half the elements, either the odd or the even numbered elements. Only one element will have its state changed by the increment or decrement control signal, and it will be the element for which the previous delay's corresponding element is already set or un-set depending upon the applicable case. |
申请公布号 |
US9350338(B2) |
申请公布日期 |
2016.05.24 |
申请号 |
US201414476523 |
申请日期 |
2014.09.03 |
申请人 |
United Memories, Inc. |
发明人 |
Faue Jon Allan;Yingtavorn Shane Pinit |
分类号 |
H03K5/159;H03K5/13;H03K5/00 |
主分类号 |
H03K5/159 |
代理机构 |
Hogan Lovells US LLP |
代理人 |
Meza Peter J.;Hogan Lovells US LLP |
主权项 |
1. A digitally adjustable delay line comprising a series of equal delay elements, wherein each delay element is configured to be adjustable to increase or decrease the propagation delay therethrough by adjusting a single delay element based on the state of a previous delay element. |
地址 |
Colorado Springs CO US |