发明名称 INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF
摘要 An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first dielectric layer has at least one hole therein. The first conductor is disposed at least partially in the hole of the first dielectric layer. The etch stop layer is disposed on the first dielectric layer. The etch stop layer has an opening to at least partially expose the first conductor. The second dielectric layer is disposed on the etch stop layer and has at least one hole therein. The hole of the second dielectric layer is in communication with the opening of the etch stop layer. The second conductor is disposed at least partially in the hole of the second dielectric layer and is electrically connected to the first conductor through the opening of the etch stop layer.
申请公布号 US2016190062(A1) 申请公布日期 2016.06.30
申请号 US201514850848 申请日期 2015.09.10
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 ZHENG Zhi-Sheng;WANG Chih-Lin
分类号 H01L23/522;H01L23/532;H01L21/768 主分类号 H01L23/522
代理机构 代理人
主权项 1. A method for manufacturing an interconnection structure, the method comprising: forming at least one first hole in a first dielectric layer; forming a first conductor in the first hole; etching back the first dielectric layer, such that the first conductor has a portion protruding from the first dielectric layer; forming an etch stop layer on the first dielectric layer and the protruding portion of the first conductor; forming a second dielectric layer on the etch stop layer; forming at least one second hole through the second dielectric layer and the etch stop layer, such that the protruding portion of the first conductor is at least partially exposed by the second hole; and forming a second conductor in the second hole.
地址 Hsinchu TW