发明名称 PATH SEARCH CIRCUIT FOR RECEIVER ADOPTING DS-CDMA SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide a receiver adopting the DS-CDMA system where an arithmetic amount and a memory amount to detect path timing can be reduced. SOLUTION: An interleave section 201 divides a received signal rxd into two sequences rxd1, rxd2 at an interval of one chip, FFTs 2021, 2022 respectively segment the two sequences with overlapped FFT windows to conduct FFT. Cross power spectrum calculation sections 2041, 2042 obtain a cross power spectrum of the received signal subjected to FFT and a reference signal stored in a reference signal storage section 203. After averaging sections 2051, 2052 average the output for each FFT window, IFFT 2061, 2062 conduct IFFT. A de-interleaving section 207 rearranges two obtained inter-correlation coefficient in time sequence and an interpolation section 208 conducts interpolation with accuracy required for path timing detection.</p>
申请公布号 JP2001313589(A) 申请公布日期 2001.11.09
申请号 JP20000128191 申请日期 2000.04.27
申请人 NEC CORP 发明人 SATO TOSHIBUMI
分类号 H04L27/18;H04B1/707;H04B1/7085;H04B7/26;H04L7/00;H04W4/00;H04W56/00 主分类号 H04L27/18
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