| 摘要 |
A method is provided for testing RAM blocks embedded in an integrated circuit. The method provides a scan circuit embedded in an integrated circuit. The scan circuit includes a RAM block, a plurality of first flip-flops each sending a read address to the RAM block, a plurality of second flip-flops each sending a write address to the RAM block, a plurality of third flip-flops each sending an enable signal to the RAM block, a plurality of fourth flip-flops, and a multiplexer receiving an output from the RAM block, the first, second, third and fourth flip-flops being connected in series. An internal scan test is performed by loading serial data into the first, second, third and fourth flip-flops.
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