| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an improved semiconductor memory device having a vertical transistor using a silicon pillar such as a DRAM and a phase change memory. <P>SOLUTION: In a semiconductor memory device, a cell transistor Tr is constituted of a silicon pillar 10, and each first diffusion layer 11 positioned on the lower portion of the silicon pillar 10 is connected to reference potential wiring PL. Gate electrodes 14 covering the silicon pillars 10 adjacent to each other in a word line direction contact with each other. Further, the gate electrode 14 is connected to the wiring of an upper layer via a dummy gate electrode and an auxiliary word line. A cavity 60 is formed between an interlayer insulating film 61 and an interlayer insulating film 62. Most of portions of adjacent capacitors Cp are adjacent to each other via the cavity 60. Therefore, capacitance between the capacitors is drastically reduced. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
