发明名称 Method of forming a complementary metal-oxide-semiconductor (CMOS) device
摘要 A complementary metal-oxide-semiconductor (CMOS) device and methods of formation thereof are disclosed. In a particular example, a method of forming a CMOS device includes forming a first layer on an extension layer of a wafer, forming a first gate on a portion of the first layer, and forming an expansion region proximate to the extension layer. The method also includes removing a portion of the first gate to create a cavity and removing a portion of the first layer to extend the cavity to the extension layer.
申请公布号 US9349656(B2) 申请公布日期 2016.05.24
申请号 US201414496225 申请日期 2014.09.25
申请人 QUALCOMM Incorporated 发明人 Yang Bin;Li Xia;Yuan Jun
分类号 H01L21/00;H01L21/8238;H01L27/12;H01L21/84;H01L29/423;H01L29/66;H01L29/78;H01L29/165;H01L29/10;H01L29/47;H01L21/28 主分类号 H01L21/00
代理机构 代理人 Qiu Xiaotun
主权项 1. A method of forming a complementary metal-oxide-semiconductor (CMOS) device, the method comprising: forming a first layer on an extension layer of a wafer, wherein the extension layer includes a first region associated with a p-type transistor and a second region associated with an n-type transistor, wherein the first region includes a first channel region between a first well implants region and a second well implants region, and wherein the second region includes a second channel region between a third well implants region and a fourth well implants region; forming a gate on the first region, wherein the gate is in contact with the extension layer and in contact with a first expansion region and a second expansion region that include a portion of the first layer, wherein the first expansion region provides a first conducting path between a first source and the first well implants region, and wherein the second expansion region provides a second conducting path between a first drain and the second well implants region; forming a second gate on the second region, wherein the second gate is in contact with the extension layer and in contact with a third expansion region and a fourth expansion region formed on a portion of the second region; and wherein the first expansion region, the second expansion region, the third expansion region, and the fourth expansion region comprise undoped semiconducting material.
地址 San Diego CA US