| 发明名称 | Method for mechanical stress enhancement in semiconductor devices | ||
| 摘要 | The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having an active region; at least one operational device on the active region, wherein the operational device include a strained channel; and at least one first dummy gate disposed at a side of the operational device and on the active region. | ||
| 申请公布号 | US9349655(B2) | 申请公布日期 | 2016.05.24 |
| 申请号 | US200912391821 | 申请日期 | 2009.02.24 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Diaz Carlos H.;Sheu Yi-Ming;Wang Anson;Thei Kong-Beng;Chung Sheng-Chen;Tsai Hao-Yi;Chen Hsien-Wei;Chuang Harry Hak-Lay;Jeng Shin-Puu |
| 分类号 | H01L21/70;H01L21/8238;H01L27/02;H01L29/165;H01L29/66;H01L29/78 | 主分类号 | H01L21/70 |
| 代理机构 | Haynes and Boone, LLP | 代理人 | Haynes and Boone, LLP |
| 主权项 | 1. An integrated circuit, comprising: an active region in a semiconductor substrate; at least one operational device on the active region, wherein the operational device includes a strained channel; a first dummy gate disposed at a side of the operational device and directly on the active region; a dummy active region in the semiconductor substrate and adjacent the active region; a shallow trench isolation (STI) interposed between the active region and the dummy active region; and a second dummy gate disposed on the dummy active region. | ||
| 地址 | Hsin-Chu TW | ||