发明名称 |
VERY SMALL PIXEL PITCH FOCAL PLANE ARRAY AND METHOD FOR MANUFACTURING THEREOF |
摘要 |
An imaging device includes a first semiconductor layer having a first surface and a second surface and a first photodetector having a first implanted region formed in the first semiconductor layer and a pad formed over the first implanted region. The imaging device also includes a readout circuit disposed over the first surface of the first semiconductor layer. The readout circuit has a plurality of contact plugs facing the first surface of the first semiconductor layer. The imaging device further includes a second semiconductor layer disposed below the second surface of the first semiconductor, a second photodetector having a second implanted region formed in the second semiconductor layer, and a metalized via extending through the first semiconductor layer and the second semiconductor layer and electrically connecting the second implanted region to a second of the contact plugs of the readout circuit. |
申请公布号 |
US2016163757(A1) |
申请公布日期 |
2016.06.09 |
申请号 |
US201615045139 |
申请日期 |
2016.02.16 |
申请人 |
DRS Network & Imaging Systems, LLC |
发明人 |
Mitra Pradip |
分类号 |
H01L27/146 |
主分类号 |
H01L27/146 |
代理机构 |
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代理人 |
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主权项 |
1. An imaging device comprising:
a first semiconductor layer having a first surface and a second surface; a first photodetector having a first implanted region formed in the first semiconductor layer and a pad formed over the first implanted region, the pad having a malleable metallic material; a readout circuit disposed over the first surface of the first semiconductor layer, the readout circuit having a plurality of contact plugs facing the first surface of the first semiconductor layer, a first of the contact plugs having a first base and a first prong extending from the first base and into the malleable metallic material of the pad of the first photodetector; a second semiconductor layer disposed below the second surface of the first semiconductor; a second photodetector having a second implanted region formed in the second semiconductor layer; and a metalized via extending through the first semiconductor layer and the second semiconductor layer and electrically connecting the second implanted region to a second of the contact plugs of the readout circuit. |
地址 |
Melbourne FL US |