| 主权项 |
1. A gate driver for a display panel, comprising:
a first gate pulse generator circuit to receive gate timing control signals and to generate a first gate pulse on a first gate line by driving a high supply voltage onto the first gate line via a first high drive transistor during a first gate pulse period, to discharge the first gate line through the first high drive transistor during a first discharge period following the first gate pulse period, and to drive a low supply voltage onto the first gate line via a first low drive transistor during a first gate off period following the first discharge period; a second gate pulse generator circuit to receive the gate timing control signals and to generate a second gate pulse on a second gate line by driving the high supply voltage onto the second gate line via a second high drive transistor during a second gate pulse period, to discharge the second gate line through the second high drive transistor during a second discharge period following the second gate pulse period, and to drive the low supply voltage onto the second gate line via a second low drive transistor during a second gate off period following the second discharge period; a first gate pulse modulation circuit to provide the high supply voltage to the first gate pulse generator and the second gate pulse generator via an output terminal during the first pulse period and the second pulse period, and to couple a source terminal of the first high drive transistor and a source terminal of the second high drive transistor to a first return line via the output terminal during the first and second discharge periods. |
