发明名称 3DIC interconnect apparatus and method
摘要 An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls of the first opening. One or more etch processes form one or more spacer-shaped structures along sidewalls of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.
申请公布号 US9412719(B2) 申请公布日期 2016.08.09
申请号 US201314135103 申请日期 2013.12.19
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Tsai Shu-Ting;Yaung Dun-Nian;Liu Jen-Cheng;Chen U-Ting;Chou Shih Pei
分类号 H01L23/48;H01L23/52;H01L25/065;H01L25/00;H01L23/00;H01L21/768 主分类号 H01L23/48
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. An apparatus comprising: a first semiconductor chip comprising a first substrate, a plurality of first dielectric layers and a plurality of first metal lines formed in the first dielectric layers over the first substrate; a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, wherein the second semiconductor chip comprises a second substrate, a plurality of second dielectric layers and a plurality of second metal lines formed in the second dielectric layers over the second substrate; a conductive plug extending from a second surface of the first semiconductor chip to one of the plurality of second metal lines in the second semiconductor chip; and a plurality of dielectric liners interposed between the conductive plug and the first substrate, at least one of the plurality of dielectric liners not extending between the conductive plug and the plurality of first dielectric layers, the plurality of dielectric liners comprising a first dielectric liner and a second dielectric liner, the first dielectric liner contacting the first substrate, and the second dielectric liner contacting the first dielectric liner, an uppermost surface of the second dielectric liner not extending above an uppermost surface of the first dielectric liner, an uppermost surface of the conductive plug being level with the uppermost surface of the first dielectric liner.
地址 Hsin-Chu TW