发明名称 |
HIGH VOLTAGE ARCHITECTURE FOR NON-VOLATILE MEMORY |
摘要 |
A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV signal is above a highest voltage of a power supply. The erasing also includes applying the first HV signal to a local bit line (BL). |
申请公布号 |
WO2016204819(A1) |
申请公布日期 |
2016.12.22 |
申请号 |
WO2016US14581 |
申请日期 |
2016.01.22 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
GEORGESCU, Bogdan;MOSCALUK, Gary;RAGHAVAN, Vijay;KOUZNETSOV, Igor |
分类号 |
H01L29/80;H01L31/113 |
主分类号 |
H01L29/80 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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