发明名称 |
VIDEO SIGNAL DIGITAL PROCESSING CIRCUIT AND METHOD |
摘要 |
The circuit comprises an A/D converter (2) for converting an input analog video signal employing the NTSC or PAL system into a digital video signal, and a frequency converter (3) for generating a signal at sampling frequency f5 and converting a chrominance subcarrier frequency of the digital video siganl into a frequency f5/4. A decimation circuit (5) perfoms a third decimation process w.r.t. the output signal of the frequency converter by extracting samples with an interval of two samples. A signal processing circuit (6) subjects an output signal of the decimation circuit to a predetermined signal processing.
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申请公布号 |
KR900003778(B1) |
申请公布日期 |
1990.05.31 |
申请号 |
KR19850006918 |
申请日期 |
1985.09.21 |
申请人 |
NIPPON VICTOR CO.LTD. |
发明人 |
KOBAYASHI KAORU;OZAKI HIDETOSHI |
分类号 |
H04N11/04;(IPC1-7):H04N11/04 |
主分类号 |
H04N11/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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