发明名称 |
Redundancy scheme for memory circuits |
摘要 |
A redundancy scheme for memory circuits that eliminates the need for physical disconnection or logical deselection of defective elements. The invention does not require disabling a defective element and allows it to operate and generate bad data. The circuit is designed such that the redundant element is able to override the defective element. Various approaches to row and column redundancy based on this principal are disclosed for memory circuit such as dynamic and static random access memories.
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申请公布号 |
US5495445(A) |
申请公布日期 |
1996.02.27 |
申请号 |
US19940252284 |
申请日期 |
1994.05.31 |
申请人 |
TOWNSEND AND TOWNSEND AND CREW |
发明人 |
PROEBSTING, ROBERT J. |
分类号 |
G11C11/401;G11C7/12;G11C29/00;G11C29/04;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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