发明名称 Manufacturing method for laminated chip electronic part
摘要 A method to manufacture a laminated chip capacitor by laminating and bonding elementary body sheets 14a, 14b which have via holes 17a, 17b and internal electrodes 11a, 11b, and are made of an insulating material, external electrode sheets 15a, 15b which are made of an insulating material, and a dummy sheet 16 which has via hole 17a and is made of an insulating material, treating the sheets to eliminate a binder, and calcining the sheets. This method allows the external electrode sheets 15a, 15b to form external terminal electrodes by themselves, thereby permitting the external terminal electrodes to be formed extremely easily only on two end surfaces of an elementary body opposed to each other.
申请公布号 US6165866(A) 申请公布日期 2000.12.26
申请号 US19980209430 申请日期 1998.12.11
申请人 TAIYO YUDEN CO., LTD. 发明人 KOBAYASHI, KEIICHI
分类号 H01F41/04;H01F17/00;H01F27/29;H01G4/30;(IPC1-7):H01L21/20 主分类号 H01F41/04
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