发明名称 METHODS, APPARATUS, INSTRUCTIONS AND LOGIC TO PROVIDE VECTOR PACKED TUPLE CROSS-COMPARISON FUNCTIONALITY
摘要 Instructions and logic provide SIMD vector packed tuple cross-comparison functionality. Some processor embodiments include first and second registers with a variable plurality of data fields, each of the data fields to store an element of a first data type. The processor executes a SIMD instruction for vector packed tuple cross-comparison in some embodiments, which for each data field of a portion of data fields in a tuple of the first register, compares its corresponding element with every element of a corresponding portion of data fields in a tuple of the second register and sets a mask bit corresponding to each element of the second register portion, in a bit-mask corresponding to each unmasked element of the corresponding first register portion, according to the corresponding comparison. In some embodiments bit-masks are shifted by corresponding elements in data fields of a third register. The comparison type is indicated by an immediate operand.
申请公布号 US2016188336(A1) 申请公布日期 2016.06.30
申请号 US201414588247 申请日期 2014.12.31
申请人 Intel Corporation 发明人 Valentine Robert;Hughes Christopher J.;Charney Mark J.;Sperber Zeev;Gradstein Amit;Rubanovich Simon;Ould-Ahmed-Vall Elmoustapha;Gebil Yuri
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项 1. A processor comprising: a first vector register to store, in each of a plurality of n data fields, an element of a first data type; a second vector register or memory storage set to store, in each of a plurality of n data fields, a corresponding element of the first data type; a decode stage to decode a first instruction specifying a vector packed tuple cross-comparison operation and a tuple size; and one or more execution units, responsive to the decoded first instruction, to: for each data field of a tuple-sized portion of said plurality of n data fields in the first vector register, compare its corresponding element with every element of a corresponding tuple-sized portion of the plurality of n data fields of said second vector register or memory storage set, andset a mask bit corresponding to each element of said second vector register or memory storage set tuple-sized portion, in a bit-mask corresponding to each unmasked element of the corresponding first vector register tuple-sized portion, according to the corresponding comparison.
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