Silicon-containing, tunneling field-effect transistor including III-N source

摘要

Tunneling field-effect transistors including silicon, germanium or silicon germanium channels and III-N source regions are provided for low power operations. A broken-band heterojunction is formed by the source and channel regions of the transistors. Fabrication methods include selective anisotropic wet-etching of a silicon substrate followed by epitaxial deposition of III-N material and/or germanium implantation of the substrate followed by the epitaxial deposition of the III-N material.

主权项

1. A tunneling field-effect transistor comprising:
a source region comprised of an epitaxial n-type III-N material including InGaN; a p-type drain region; a p-type SixGe1−x channel region operatively associated with the source and drain regions and forming a broken-band heterojunction with the source region, wherein x is between 0 and 1 and the n-type, III-N material has an electron affinity larger than the hole affinity of the channel region; a crystalline SixGe1−x substrate where x is greater than 0 and less than 1, the channel region being comprised of a portion of the crystalline SixGe1−x substrate, the source region comprising an epitaxial layer adjoining a (111) surface of the crystalline SixGe1−x substrate; a gate electrode, and a gate dielectric layer between the gate electrode and the channel region, the gate dielectric layer overlapping the source region.