Semiconductor integrated circuit device having vertical channel and method of manufacturing the same

摘要

A semiconductor integrated circuit device having a vertical channel and a method of manufacturing the same are provided. A plurality of active lines are formed in a semiconductor substrate. A gate electrode having a lower height than each active line is formed on a sidewall of the active line. A first insulating layer having a height lower than that of the active line and higher than that of the gate electrode is buried between active lines, and a silicide layer is formed on an exposed upper surface and a lateral surface of the active line.

主权项

1. A method of manufacturing a semiconductor integrated circuit device, the method comprising:
forming an active line over a semiconductor substrate, the active line including a first sidewall and a second sidewall; forming a first gate electrode over a lower portion of the first sidewall of the active line; forming a second gate electrode over a lower portion of the second sidewall of the active line; forming a first insulating layer between the active line and a neighboring active line to bury the first and the second gate electrodes, wherein an upper portion of the active line is exposed over the first insulating layer; forming a drain region in the upper portion of the active line and forming a common source region extending from the semiconductor substrate under the active line to the semiconductor substrate under the neighboring active line; and forming a silicide layer over an upper surface and a sidewall of the upper portion of the active line, wherein the first and the second gate electrodes are formed to be parallel with the active line.