| 摘要 |
Provided is a CPU monitoring device equipped with a memory including a plurality of memory areas that are provided in correspondence to a plurality of CPU cores, a monitoring unit for monitoring whether processes being executed by the plurality of CPU cores are operating normally on the basis of the update states of data recorded in the plurality of memory areas, and a reset signal output unit for outputting a reset signal to the plurality of CPU cores when the monitoring unit detects that the processes being executed by the plurality of CPU cores are not operating normally. Each of the plurality of CPU cores is assigned an idle process for updating data that is recorded in a memory area provided in correspondence to the CPU core, and that has the lowest processing priority in the CPU core. |
