| 摘要 |
A semiconductor device fabricated by a method of reducing electromigration in Cu interconnect lines by forming an interim layer of Ca-doped copper seed layer lining a via in a chemical solution. The method reduces the drift velocity, thereby decreasing the Cu migration rate in addition to void formation rate. The method comprises: depositing a Cu seed layer in the via; treating the Cu seed layer in a chemical solution, selectively forming a Cu-Ca-X conformal layer on the Cu seed layer, wherein X denotes at least one contaminant; and processing the Cu-Ca-X conformal layer, effecting a thin Cu-Ca conformal layer on the Cu seed layer; annealing the thin Cu-Ca conformal layer onto the Cu seed layer, removing the at least one contaminant, thereby forming a contaminant-reduced Cu-Ca alloy surface on the Cu seed layer; electroplating the contaminant-reduced Cu-Ca alloy surface with Cu, thereby forming a contaminant-reduced Cu-Ca/Cu interconnect structure; annealing the at least one contaminant-reduced Cu-Ca/Cu interconnect structure, thereby forming at least one virtually void-less and contaminant-reduced Cu-Ca/Cu interconnect structure; and chemical mechanical polishing the at least one virtually void-less and contaminant-reduced Cu-Ca/Cu interconnect structure in the semiconductor device.
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