发明名称 Grooming switch hardware scheduler
摘要 A hardware scheduler for a grooming switch with at least three switching stages accumulates a list of connection requests that cannot be granted given currently granted connection assignments. At a designated time, two data structures are dynamically built: an xRAM which records, for each output of a switch slice, which input is currently assigned to that output; and a yRAM which records, for each of the same outputs, the output of a second switch slice that is connected to a corresponding input of the second switch slice. Connections are assigned to satisfy the stored unassigned requests, by reassigning existing connection assignments using the xRAM and yRAM data structures.
申请公布号 US7330428(B2) 申请公布日期 2008.02.12
申请号 US20030420017 申请日期 2003.04.18
申请人 LSI LOGIC CORPORATION 发明人 HONG BO
分类号 H04Q11/06;H04L12/56 主分类号 H04Q11/06
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