Converter

摘要

Provided is a data converter which is provided with a clock signal input part which inputs a clock signal, and an input part which inputs an input signal, a sampling part which, in response to the clock signal input to the clock signal input part, performs sampling of the input signal input to the input part, and a signal processing part which performs signal processing according to the sampling cycle and outputs an output signal, wherein when the cycle of the clock signal input to the clock signal input part becomes longer, the output signals output by the signal processing part are reduced.

主权项

1. A data converter comprising:
a clock signal input part configured to input a clock signal; an input part configured to input an input signal; a sampling part configured to perform sampling of the input signal input to the input part in response to the clock signal input to the clock signal input part; and a signal processing part configured to perform signal processing according to a sampling cycle and outputs an output signal, and in case of the cycle of the clock signal input to the clock signal input part becoming longer, the output signal output by the signal processing part being reduced.