PACKAGED SEMICONDUCTOR DEVICES

摘要

A packaged semiconductor device is provided, which includes a substrate comprising a contact pad; a passivation layer disposed on the substrate, where the passivation layer covers part of the contact pad; an under bump metallization (UBM) layer disposed on the substrate, where the UBM layer is coupled to the contact pad; a conductive bump disposed on the UBM layer, where the conductive bump comprises a column connecting the UBM layer and a cap disposed on top of the column; and a solder ball encapsulating the conductive bump. The cap includes a bottom area larger than a cross-sectional area of the column, and a bottom of the cap is distant from an upper surface of the passivation layer by a space.

主权项

1. A packaged semiconductor device, comprising:
a substrate comprising a contact pad; a passivation layer disposed on the substrate, the passivation layer covering part of the contact pad; an under bump metallization (UBM) layer disposed on the substrate, the UBM layer being coupled to the contact pad; a conductive bump disposed on the UBM layer, the conductive bump comprising:
a column connecting the UBM layer; anda cap disposed on top of the column, in which the cap includes a bottom area larger than a cross-sectional area of the column, and a bottom of the cap is distant from an upper surface of the passivation layer by a space; and a solder ball encapsulating the conductive bump.