发明名称 Phase multiplexer
摘要 Representative implementations of devices and techniques provide a phase multiplexer that may be associated with at least a communication device. The described phase multiplexer may be able to switch between input phases without distorting a pulse width of a given input phase. In one implementation, this is achieved by enabling one phase at a time. More specifically, a gating window specific for each given phase is provided. The gating window is designed to avoid glitches associated with signals at an output of the phase multiplexer. Furthermore, the gating window is designed to avoid the generation of pulse width modifications.
申请公布号 US9438265(B2) 申请公布日期 2016.09.06
申请号 US201414155327 申请日期 2014.01.14
申请人 Intel Corporation 发明人 Madoglio Paolo;Pellerano Stefano
分类号 G06F1/04;H03M1/82;G06F1/08;H03M1/08;H03M1/66;H03K5/13;H03L7/16;H03K5/00 主分类号 G06F1/04
代理机构 Schwegman Lundberg & Woessner, P.A. 代理人 Schwegman Lundberg & Woessner, P.A.
主权项 1. A digital to time converter, comprising: a processing element to provide a plurality of phase signals; a multiplexer circuit coupled to the processing element and including an input flip-flop element, the multiplexer circuit configured to receive the plurality of phase signals, to receive digital time information at the input flip-flop element, and to process a first signal of the plurality of phase signals during a first gating window and a second signal of the plurality of phase signals during a second gating window using one or more digital words provided by the input flip-flop element; wherein the first and second gating windows are unique from one another; and wherein an output of the multiplexer is configured to trigger the input flip-flop element.
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