发明名称 CHARGE LEVEL MAINTENANCE IN A MEMORY
摘要 In one embodiment, a memory such as a dynamic random access memory employs charge boosting to bitcells prior to sensing charge levels in the storage nodes of the bitcells. It is believed that such an arrangement may be employed to improve bitcell read-out voltages, reduce refresh power consumption, improve restore voltage levels or other features, depending upon the particular application. Other aspects are described herein.
申请公布号 WO2016153648(A1) 申请公布日期 2016.09.29
申请号 WO2016US18538 申请日期 2016.02.18
申请人 INTEL CORPORATION 发明人 TOMISHIMA, Shigeki
分类号 G11C11/403;G11C11/406;G11C11/4063 主分类号 G11C11/403
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