Controlling voltage generation and voltage comparison

摘要

An integrated circuit has voltage generating circuitry for generating an on-chip voltage from a supply voltage in response to clock pulses. Clock control circuitry controls transmission of the clock pulses to the voltage generating circuitry. The clock control circuitry receives a reference voltage and a digital offset value comprising a binary numeric value identifying an offset. The clock control circuitry suppresses transmission of the clock pulses if the on-chip voltage is greater than the sum of the reference voltage and the offset identified by the digital offset value, to reduce power consumption. The offset can be tuned digitally to vary the average level of the on-chip voltage. A similar digital tuning mechanism may be used in a clocked comparator to compare a first voltage with a digitally tunable threshold voltage.

主权项

1. A clocked comparator comprising:
a first voltage input configured to receive a first voltage; a reference voltage input configured to receive a reference voltage; a clock input configured to receive an input clock signal; an offset input configured to directly receive a digital offset value comprising a binary numeric value identifying an offset; comparing circuitry configured to generate an output signal indicating whether, at a clock transition of the input clock signal, the first voltage is greater or less than a sum of the reference voltage and the offset identified by the digital offset value; and tuning circuitry configured to adjust the comparing circuitry to vary the offset in response to the digital offset value.