| 摘要 |
PROBLEM TO BE SOLVED: To suppress generation of leak current at a pn junction upon finishing a contact process by dividing an interlayer insulation layer in a multilayer interconnection structure into upper and lower layers and forming a thin film resistor between them. SOLUTION: A first TEOS (tetraethoxy silane) 34 is deposited, as an interlayer insulation layer, on a P-SiN 33 and palatalized by SOG(spin on glass) 35 before depositing a No.2aTESO 36. A thin film resistor 37 is formed at a predetermined position on the No.2aTESO 36. The thin film resistor 37 is formed by sputtering CrSi by about 15nm thick and covered with an interlayer insulator of No.2bTEOS 40. Since an LOCOS 27 is deposited, as a region 27a having fine irregularities, beneath the region for forming the thin film resistor 37, an adverse effect can be prevented on the trimming process by interference light. |
