发明名称 Semiconductor memory device and refreshing method of semiconductor memory device
摘要 A semiconductor memory device that suppresses an increase in the circuit area which is originated from the layout of address signal lines. The semiconductor memory device includes refresh address counters, a switch circuit, and address holding circuits. The refresh address counters generate refresh address signals associated with banks in response to a refresh request signal. The switch circuit selectively outputs the external address signal and a refresh address signal generated by one of the refresh address counters in accordance with the refresh request signal. Each of the address holding circuits holds the refresh address signal or the external address signal output from the switch circuit and supplies the held address signal to an associated one of the banks.
申请公布号 US2001043499(A1) 申请公布日期 2001.11.22
申请号 US20010861545 申请日期 2001.05.22
申请人 FUJITSU LIMITED 发明人 KOMURA KAZUFUMI;FURUYAMA TAKAAKI;KAWAMOTO SATORU
分类号 G11C11/406;(IPC1-7):G11C7/00 主分类号 G11C11/406
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