| 摘要 |
<p>A method for manufacturing a dual poly gate of a semiconductor device is provided to improve operation reliability of the semiconductor device by preventing dopants from diffusing out of a polysilicon layer. A device isolation oxide film(105), an NMOS reserved region, and a PMOS reserved region are defined on a semiconductor substrate. A gate oxide film(107) and a non-doped polysilicon layer(111) are sequentially deposited on the semiconductor substrate. An N+ dopant is injected on the polysilicon layer on the NMOS reserved region to form an NMOS region. A P+ dopant is injected on the polysilicon layer on the PMOS reserved region to form a PMOS region. A barrier metal layer having a metal silicide layer(121) and a TiN layer(123) is deposited on a resultant structure. A tungsten layer(125) is formed on the barrier metal layer by using a CVD process. The CVD tungsten layer and the polysilicon layer are patterned to expose the device isolation oxide film, such that gate electrodes are formed on the NMOS and PMOS regions.</p> |
