| 摘要 |
A system comprises a processor core and a cache coupled to the core and comprising at least one cache way dedicated to the core, where the cache way comprises multiple cache lines. The system also comprises a cache controller coupled to the cache. Upon receiving a data request from the core, the cache controller determines whether the cache has a predetermined amount of invalid cache lines. If the cache does not have the predetermined amount of invalid cache lines, the cache controller is adapted to allocate space in the cache for new data, where the space is allocable in the at least one cache way dedicated to the core.
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