INTERFACE CIRCUIT FOR HIGH SPEED COMMUNICATION, AND SEMICONDUCTOR APPARATUS AND SYSTEM INCLUDING THE SAME

摘要

An interface circuit of a semiconductor apparatus may include a pulse generation unit, a data clock synchronization unit and a system clock synchronization unit. The pulse generation unit may be configured to generate a burst end pulse from a burst end signal according to a data clock signal. The data clock synchronization unit may be configured to enable a data clock synchronization signal based on the burst end pulse and the data clock signal, and disable the data clock synchronization signal according to a burst end detection signal. The system clock synchronization unit may be configured to generate the burst end detection signal by synchronizing the data clock synchronization signal with a system clock signal.

主权项

1. A semiconductor apparatus including an interface circuit comprising:
a pulse generation unit configured to generate a burst end pulse from a burst end signal according to a data clock signal; a data clock synchronization unit configured to enable a data clock synchronization signal based on the burst end pulse and the data clock signal, and disable the data clock synchronization signal according to a burst end detection signal; and a system clock synchronization unit configured to generate the burst end detection signal by synchronizing the data clock synchronization signal with a system clock signal.