Adaptive Clocking Scheme

摘要

Adaptive clocking schemes for synchronized on-chip functional blocks are provided. The clocking schemes enable synchronous clocking which can be adapted according to changes in signal path propagation delay due temperature, process, and voltage variations, for example. In embodiments, the clocking schemes allow for the capacity utilization of a logic path to be increased.

主权项

1. A system, comprising:
a first functional block; a first latch circuit, coupled to an output of the first functional block; a second functional block; a second latch circuit, coupled to an input of the second functional block; a system clock coupled to the first latch circuit and the second latch circuit; a logic path that couples the output of the first latch circuit and the input of the second latch circuit; a clock path having a first endpoint and a second endpoint, the first end point and the second endpoint being coupled to a second input of the first latch circuit and a second input of the second latch circuit, respectively; and a feedback path between the second endpoint of the clock path and the first endpoint of the clock path.