发明名称 MOUNTING METHOD OF TWO-TERMINAL CHIP COMPONENT, AND MOUNTING STRUCTURE OF TWO-TERMINAL CHIP COMPONENT
摘要 <P>PROBLEM TO BE SOLVED: To provide a highly reliable mounting technique by which two-terminal chip components are mounted on a substrate at high density and a short circuit, a contact failure, etc., hardly occur. Ž<P>SOLUTION: A mounting method is disclosed in which the two-terminal chip components 20 each having terminals 21 at both right and left ends with an insulation portion 22 interposed therebetween are disposed and mounted in multiple arrays on the substrate 1a. The method includes: a land formation step where two mounting lands (11a, 11b) are formed into one set (10a, 10b) and multiple land arrays (30a, 30b) each having the multiple sets of mounting lands formed in one column are formed; and a mounting step where terminals of the two-terminal chip components are soldered to the mounting lands. In the land formation step, arrangements (12a, 12b) of mounting lands in adjacent arrays are formed different from each other in the vertical direction, and in the mounting step, the two-terminal chip components mounted for each set of the mounting lands in the adjacent arrays are mounted in such a manner that positions of the terminals and positions of insulation portions match each other in the vertical direction. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010021192(A) 申请公布日期 2010.01.28
申请号 JP20080177990 申请日期 2008.07.08
申请人 FDK MODULE SYSTEM TECHNOLOGY CORP 发明人 SAKAYORI TAKASHI
分类号 H05K3/34;H05K1/18 主分类号 H05K3/34
代理机构 代理人
主权项
地址