发明名称 Semiconductor memory device and data writing method of the same
摘要 A semiconductor memory device includes memory cells which are laminated on a semiconductor substrate and include charge storage layers and control gates, a plurality of word lines each of which is commonly connected to the control gates of a plurality of the memory cells, and a control unit which performs programming and verification of data in units of a page of memory cells. The control unit consecutively performs programming of data in two or more pages of memory cells connected to the same word line, and then consecutively performs verification of the data programmed in the two or more pages of memory cells connected to the same word line.
申请公布号 US9361998(B2) 申请公布日期 2016.06.07
申请号 US201314015985 申请日期 2013.08.30
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Maejima Hiroshi
分类号 G11C16/34;G11C8/08;G11C16/08 主分类号 G11C16/34
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A semiconductor memory device comprising: a block of memory cells, the memory cells of the block being erasable as a unit, the block including a first memory string and a second memory string, the first memory string including a first selection transistor and a plurality of first memory cells which are stacked above a semiconductor substrate, the second memory string including a second selection transistor and a plurality of second memory cells which are stacked above the semiconductor substrate; a plurality of word lines, each of which is commonly connected to control gates of one of the first memory cells and one of the second memory cells; and a control unit configured to perform programming and verification of data in the memory cells, wherein the control unit is configured to consecutively perform programming of data in a first page that includes one of the first memory cells and a second page that is connected to the same word line as the first page and includes one of the second memory cells, by turning on the first selection transistor and turning off the second selection transistor when programming data in the first page and then turning on the second selection transistor and turning off the first selection transistor when programming data in the second page, and then to consecutively perform verification of data in said first and second pages of the memory cells.
地址 Tokyo JP
您可能感兴趣的专利