| 发明名称 |
Sensing data in resistive switching memory devices |
| 摘要 |
Structures and methods of operating a resistive switching memory device are disclosed herein. In one embodiment, a resistive switching memory device can include: (i) a plurality of resistive memory cells, where each of the resistive switching memory cells is configured to be programmed to a low resistance state by application of a first voltage in a forward bias direction, and to be erased to a high resistance state by application of a second voltage in a reverse bias direction; and (ii) a sensing circuit coupled to at least one of the plurality of resistive memory cells, where the sensing circuit is configured to read a data state of the at least one resistive memory cell by application of a third voltage in the forward bias direction or the bias reverse direction. |
| 申请公布号 |
US9361975(B2) |
申请公布日期 |
2016.06.07 |
| 申请号 |
US201313793685 |
申请日期 |
2013.03.11 |
| 申请人 |
Adesto Technologies Corporation |
发明人 |
Gilbert Nad Edward;Dinh John;Jameson, III John Ross;Kozicki Michael N.;Hollmer Shane Charles |
| 分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
| 代理机构 |
|
代理人 |
Stephens, Jr. Michael C. |
| 主权项 |
1. A resistive switching memory device, comprising:
a) a plurality of resistive memory cells, wherein each of the resistive switching memory cells is configured to be programmed to a low resistance state by application of a first voltage in a forward bias direction, and to be erased to a high resistance state by application of a second voltage in a reverse bias direction; and b) a sensing circuit coupled to at least one of the plurality of resistive memory cells, wherein the sensing circuit is configured to read a data state of the at least one resistive memory cell by application of a third voltage in the forward bias direction, and wherein the sensing circuit is also configured to read the data state of the at least one resistive memory cell by application of the third voltage in the reverse bias direction. |
| 地址 |
Sunnyvale CA US |
