| 摘要 |
forming a trench(3) for forming a vertical MOSFET channel region in a semiconductor substrate(2); removing a photosensitive film(5) to form final fine gate electrode(6) and word line(7) by etching an exposed polysilicon; depositing an insulation oxide film(10) and BPSG film(11) of regular thickness to insulate elements from one another and performing a planarising process by etching the whole surface; depositing mask polysilicon using the bit line contact hole mask and forming a spacer polysilicon(13) by anisotropic etching process; forming bit line(14,14') by silicide and polysilicon in turn using the bit line mask, performing planarising process by etching BPSG film(16), and forming a etching barrier film(17), a sacrificial oxide film(18) and a mask polysilicon(19) in turn; forming a charge storage electrode(21); and forming a plate electrode(23) by depositing the polysilicon with implanted impurity ions and etching the polysilicon using the mask. The method decreases the area of unit cell of DRAM and short channel effect of MOSFET, and enhances reliability of element.
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