发明名称 Accessing data stored in a command/address register device
摘要 A register not connected to a data bus is read by transferring data across an address bus to a device connected to the data bus, from which the data is read by a device connected to the data bus. The register resides in a register device connected via the address bus to a memory device that is connected to both the address bus and the data bus. A host processor triggers the register device to transfer information over the address bus to a register on the memory device. The host processor then reads the information from the register of the memory device.
申请公布号 US9436632(B2) 申请公布日期 2016.09.06
申请号 US201414560976 申请日期 2014.12.04
申请人 Intel Corporation 发明人 Bains Kuljit S.;Ruff Klaus J.;Vergis George;Sah Suneeta
分类号 G06F13/28;G06F11/10;G06F11/16;G11C29/44;G06F13/16 主分类号 G06F13/28
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. An apparatus comprising: a dynamic random access memory (DRAM) comprising at least one page having at least one multipurpose register (MPR) and comprising: a first interface that, when operatively coupled to an address bus, is to receive a control word (CW) and provide the CW to a particular MPR anda second interface communicatively coupled to the at least one page having at least one MPR, wherein:the at least one page having at least one MPR to be written-to using the first interface during a coupling of the first interface to the address bus and to be read-from using the second interface during a coupling of the second interface to a data bus.
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