Process and device for phase and frequency locking of an oscillator.

摘要

In the locking process, the reference signal S is sampled by the clock signal H from the oscillator 1, and then digitized. From the sampled and digitized signal is deduced the value representing the phase error en, and then from this phase error a correction value for a digital value representing the oscillator's control voltage. The device allows the implementation of this process. The invention also relates to a voltage-controlled quartz oscillator including such a device. <IMAGE>