HARDWARE PERIPHERAL DECODERS

摘要

An integrated circuit comprises: at least two inputs (18, 20); and a decoder (24) arranged to: sample (28) said inputs in a first cycle; sample said inputs in a second, later cycle; alter a first memory location (34) if only one of said sampled inputs changes from the first cycle to the second cycle; and alter a second memory location (46) if both of said sampled inputs change from the first cycle to the second cycle.