发明名称 |
Testing a non-volatile memory |
摘要 |
<p>An integrated circuit memory device has: a memory array; a set of data latches for holding data bits to be stored in the memory array; a plurality of data tracks for supplying data bits to the data latches; a set of address latches for holding address bits for addressing the memory array; a test bus; a data bit routing circuit connected to the data latches for selectively routing data bits to either the memory array or the test bus; an address bit routing circuit connected to the address latches for selectively routing address bits to either the array or the test bus; and an output circuit for outputting data bits and address bits on the test bus. In this way, data bits and address bits can be checked for accuracy against the originally supplied data bits and address bits. Thus, a test can be conducted without requiring data actually to be written to memory cells of the memory. <MATH></p> |
申请公布号 |
EP0698891(A1) |
申请公布日期 |
1996.02.28 |
申请号 |
EP19950305824 |
申请日期 |
1995.08.21 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
MALHI, VIJAY |
分类号 |
G11C29/02;G11C29/12;(IPC1-7):G11C29/00;G06F11/26 |
主分类号 |
G11C29/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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