发明名称 PHASE LOCKED LOOP
摘要 The invention relates to a phase locked loop comprising a voltage-controlled oscillator (1) having two tuning inputs (11, 12). A feedback signal (VTUNE) can be supplied to a tuning input (11) in a conventional phase locked loop by means of a frequency divider (2). Furthermore, a frequency word used to adjust the divider ratio of the PLL, and thus used for frequency pre-selection, is not only supplied to the frequency divider (2), but is also used for the compensatory tuning of frequency-defining components (14) in the oscillator (1). The inventive phase locked loop enables the frequency drift to be significantly reduced - especially in cost-effective open loop modulation methods - by means of a low or disappearing deviation of the tuning voltage (VTUNE) in connection with a reduction of the memory effect of capacitors in loop filters (6), with especially simple measures in terms of circuit technology.
申请公布号 WO02091580(A2) 申请公布日期 2002.11.14
申请号 WO2002DE01674 申请日期 2002.05.08
申请人 INFINEON TECHNOLOGIES AG;BALM, BART;MEVISSEN, WALTER 发明人 BALM, BART;MEVISSEN, WALTER
分类号 H03L7/099;H03L7/187;H03L7/189 主分类号 H03L7/099
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