发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To sufficiently ensure the active area of a transistor by shrinking the layout of a substrate contact without mutual diffusion due to the substrate contact. SOLUTION: A distance B1 between a mask opening area B3 for injecting n-type impurities to the substrate contact 106 of a p-type MIS transistor and the active area 101b of a p-type MIS transistor is set larger than the distance A1 between a mask opening area A3 for injecting p-type impurities to the substrate contact 107 of an n-type MIS transistor and the active area 101a of the n-type MIS transistor. COPYRIGHT: (C)2008,JPO&INPIT
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申请公布号 |
JP2008047592(A) |
申请公布日期 |
2008.02.28 |
申请号 |
JP20060219324 |
申请日期 |
2006.08.11 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
KOTANI NAOKI |
分类号 |
H01L21/8238;H01L21/28;H01L21/82;H01L27/092;H01L29/423;H01L29/49 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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