| 摘要 |
A chip package includes a patterned conductive layer, a first solder resist layer, a second solder resist layer, a chip, bonding wires and a molding compound. The patterned conductive layer has a first surface and a second surface opposite to each other. The first solder resist layer is disposed on the first surface. The second solder resist layer is disposed on the second surface, wherein a part of the second surface is exposed by the second solder resist layer. The chip is disposed on the first solder resist layer, wherein the first solder resist layer is disposed between the patterned conductive layer and the chip. The bonding wires are electrically connected to the chip and the patterned conductive layer exposed by the second solder resist layer. The molding compound encapsulates the pattern conductive layer, the first solder resist layer, the second solder resist layer, the chip and the bonding wires.
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