Semiconductor device and method for fabricating the same

摘要

A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof.

主权项

1. A method for fabricating a semiconductor device, comprising the steps:
a. providing a semiconductor-on-insulator (SOI) substrate, comprising a bulk semiconductor layer, a buried insulating layer over the bulk semiconductor layer, and a first semiconductor layer over the buried insulating layer, wherein the first semiconductor layer has a first conductivity type; b. forming a first implanted region in a plurality of parallel and separated portions of the first semiconductor layer, wherein the first implanted region comprises a second conductivity type opposite to the first conductivity type; c. forming a second semiconductor layer over the first semiconductor layer; d. forming a second implanted region in a plurality of parallel and separated portions of the second semiconductor layer, wherein the second implanted region is disposed over the first implanted region, and has the second conductivity type; e. performing a thermal diffusion process to diffuse the first implanted region in the first semiconductor layer and the implanted region in the second semiconductor layer into a first doped region and a second doped region, respectively; and f. forming a gate structure over a portion of the second semiconductor layer, a third doped region in a portion of the second semiconductor layer at a first side of the gate structure, and a fourth doped region in a portion of the second semiconductor layer at a second side opposite to the first side of the gate structure, wherein the gate structure extends over the second semiconductor layer along a second direction, and the third doped region and the fourth doped region have the second conductivity type.