发明名称 Transistor including a stressed channel, a method for fabricating the same, and an electronic device including the same
摘要 A semiconductor device includes a first channel, a second channel, a first strained gate electrode including a first lattice-mismatched layer for applying a first stress to the first channel, and a second strained gate electrode including a second lattice-mismatched layer for applying a second stress to the second channel.
申请公布号 US9520495(B2) 申请公布日期 2016.12.13
申请号 US201514863362 申请日期 2015.09.23
申请人 SK HYNIX INC. 发明人 Ji Yun-Hyuck
分类号 H01L21/8238;H01L27/092;H01L29/78;H01L21/8234;H01L29/10;H01L21/324;H01L29/49;H01L29/66 主分类号 H01L21/8238
代理机构 代理人
主权项 1. A method for fabricating a semiconductor device, the method comprising: preparing a substrate which includes a first transistor region and a second transistor region; forming a first strained gate electrode which includes a first lattice-mismatched crystalline silicon layer disposed over the first transistor region; and forming a second strained gate electrode which includes a second lattice-mismatched crystalline silicon layer disposed over the second transistor region, wherein the forming of the first lattice-mismatched crystalline silicon layer comprises: forming an arsenic-doped crystalline silicon layer by doping only arsenic; andforming an undoped crystalline silicon layer disposed over the arsenic-doped crystalline silicon layer, the undoped crystalline silicon layer being undoped with arsenic, and wherein the forming of the second lattice-mismatched crystalline silicon layer comprises: forming a boron-doped crystalline silicon layer; andforming a germanium-doped crystalline silicon layer, the germanium-doped crystalline silicon layer being disposed over the boron-doped crystalline silicon layer.
地址 Icheon KR