发明名称 THREE-PHASE OUTPUT VOLTAGE BALANCED SYSTEM FOR UNINTERRUPTIBLE POWER SOURCE
摘要 PURPOSE:To balance three-phase output voltages of an uninterruptible power source to be connected with an unspecified single-phase load. CONSTITUTION:A deviation of a mean value Vdet obtained by simultaneously three-phase rectifying three-phase output voltages from a set value Vset is obtained by a matching circuit 1. Deviations of mean values obtained by individually rectifying three-phase voltages Vu, Vv, Vw by single-phase full-wave rectifiers 5u, 5v, 5w from the value Vset are respectively obtained by matching circuits 6u, 6v, 6w, and both the deviations are added by adders 8u, 8v, 8w. Outputs of the adders 8u, 8v, 8w are multiplied by three-phase reference sine wave signals Su, Sv, Sw having different phases of 120 deg. from each other by multipliers 13u, 13v, 13w, outputs of the multipliers 13u, 13v, 13w are input to a gate logic circuit 4 to obtain gate signals of the phases, and three-phase inverters are individually PWM-operated.
申请公布号 JPH0638538(A) 申请公布日期 1994.02.10
申请号 JP19920190464 申请日期 1992.07.17
申请人 MEIDENSHA CORP 发明人 KAMANAKA YOSHIHIDE
分类号 H02J3/26;H02M1/084;H02M7/48 主分类号 H02J3/26
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