发明名称 Post passivation structure for semiconductor chip or wafer
摘要 The present invention adds one or more thick layers of polymer dielectric and one or more layers of thick, wide metal lines on top of a finished semiconductor wafer, post-passivation. The thick, wide metal lines may be used for long signal paths and can also be used for power buses or power planes, clock distribution networks, critical signal, and re-distribution of I/O pads for flip chip applications. Photoresist defined electroplating, sputter/etch, or dual and triple damascene techniques are used for forming the metal lines and via fill.
申请公布号 US7420276(B2) 申请公布日期 2008.09.02
申请号 US20040783195 申请日期 2004.02.20
申请人 MEGICA CORPORATION 发明人 LIN MOU-SHIUNG;LEE JIN-YUAN
分类号 H01L23/48;H01L21/02;H01L21/44;H01L21/4763;H01L21/50;H01L21/768;H01L23/52;H01L23/522;H01L23/525;H01L23/528;H01L23/532;H01L23/60;H01L27/06;H01L27/08 主分类号 H01L23/48
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