| 发明名称 | Meander line resistor structure | ||
| 摘要 | A system comprises a first transistor comprising a first drain/source region and a second drain/source region, a second transistor comprising a third drain/source region and a fourth drain/source region, wherein the first transistor and the second transistor are separated by an isolation region, a first resistor formed by at least two vias, wherein a bottom via of the first resistor is in direct contact with the first drain/source region, a second resistor formed by at least two vias, wherein a bottom via of the second resistor is in direct contact with the second drain/source region, a bit line connected to the third drain/source region through a plurality of bit line contacts and a capacitor connected to the fourth drain/source region through a capacitor contact. | ||
| 申请公布号 | US9461048(B2) | 申请公布日期 | 2016.10.04 |
| 申请号 | US201514880965 | 申请日期 | 2015.10.12 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Yen Hsiao-Tsung;Lin Yu-Ling |
| 分类号 | H01L27/108;H01L23/522;H01L23/528;H01L27/06;H01L29/06;H01L49/02;H01L21/8234;H01L27/08 | 主分类号 | H01L27/108 |
| 代理机构 | Slater Matsil, LLP | 代理人 | Slater Matsil, LLP |
| 主权项 | 1. A system comprising: a first transistor comprising a first drain/source region and a second drain/source region; a second transistor comprising a third drain/source region and a fourth drain/source region, wherein the first transistor and the second transistor are separated by an isolation region; a first resistor formed by at least two vias, wherein a bottom via of the first resistor is in direct contact with the first drain/source region; a second resistor formed by at least two vias, wherein a bottom via of the second resistor is in direct contact with the second drain/source region; a bit line connected to the third drain/source region through a plurality of bit line contacts; and a capacitor connected to the fourth drain/source region through a capacitor contact. | ||
| 地址 | Hsin-Chu TW | ||