| 摘要 |
PURPOSE:To generates a histogram at a high speed. CONSTITUTION:Input data from a terminal 11 are retimed by flip-flops 13 and 21 in order with the clock from a terminal 12, a 1st selector 22 selects the undelayed data in the first half of each data cycle and delayed data in the latter half from those flip-flops 13 and 21, and the selected data are used as an address to access a memory 14. Data read out of the memory 14 in the first half of the data cycle are delayed by a half cycle through a latch circuit 16. A comparator 24 compares the delayed data with the undelayed input data and its output is delayed by a half cycle through a flip-flop 25; and a 2nd selector 26 selects a numeral value when the data match each other or a numeral value 2 when not according to the comparison output. The selected numeral value is added to the numeral value (data) of the latch circuit 16 by an adder 17 and the addition data are written in the memory 15 in the latter half of the data cycle. |
