System on chip link layer protocol

摘要

A network processing system provides coherent communications between multiple system-on-chips (SOCs). Data messages between SOCs are assigned to virtual channels. An interconnect linking the SOCs divides the communications into discrete data blocks, each of which contains data segments from several virtual channels. The virtual channels can be implemented to control congestion and interference among classes of communications. During transmission, the interconnect distributes the data blocks across several physical ports linking the SOCs. As a result, communications between SOCs is optimized with minimal latency.

主权项

1. A method comprising:
generating a data message at a first system-on-chip (SOC) for transmission to a second SOC, the first and second SOCs each including a cache and a plurality of processing cores; associating the data message with one of a plurality of virtual channels; generating a data block to include data associated with each of the plurality of virtual channels, the data block including at least a portion of the data message; distributing segments of the data block across a plurality of output ports at the first SOC; and transmitting the data block to the second SOC via the plurality of output ports.