发明名称 Structured block transfer module, system architecture, and method for transferring
摘要 Structured block transfer module, system architecture, and method for transferring content or data. Circuit allowing content in one memory to be shifted, moved, or copied to another memory with no direction from a host, the circuit comprising: a connection manager, at least one copy engine, and a connection between the connection manager and the copy engine. Method for transferring the contents of one of a number of blocks of source memory to one of a number of possible destination memories comprising: selecting source memory; selecting available destination memory; marking the selected destination as no longer available; copying contents of selected source memory into selected destination memory; and marking selected source as available.
申请公布号 US9460034(B2) 申请公布日期 2016.10.04
申请号 US201414194242 申请日期 2014.02.28
申请人 Synopsys, Inc. 发明人 Attias Roberto;Jordan William Charles;Moyer Bryon Irwin;Fricke Stephen John Joseph;Deshpande Akash Renukadas;Sinha Navendu;Gupta Vineet;Sonakiya Shobhit
分类号 G06F3/06;G06F13/362;G06F13/28 主分类号 G06F3/06
代理机构 Fenwick & West LLP 代理人 Fenwick & West LLP
主权项 1. A method for transferring data from a source processing unit to a destination processing unit, the method comprising: selecting a first source processing unit comprising a source processor and a source memory configured to store data, the source memory being a private memory of the source processor; selecting a first destination processing unit comprising a destination processor and a destination memory configured to store data, the destination memory being a private memory of the destination processor; marking, by a connection manager, the destination memory in the selected first destination processing unit as no longer available; copying, by a copy engine controlled by the connection manager, a block of data from the source memory into the destination memory, wherein copying comprises: altering a portion of the block of data by passing replacement data through a multiplexer of the copy engine to the destination memory responsive to receiving a first signal at the multiplexer, andpassing unaltered data for another portion of the block of data through the multiplexer to the destination memory responsive to receiving a second signal at the multiplexer; and marking the source memory in the selected first source processing unit as available in response to copying the block of data.
地址 Mountain View CA US
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